1. Field of the Invention
The present invention relates to a magnetic storage device and a method of manufacturing the same. More particularly, it relates to a nonvolatile magnetic storage device which stores information by utilizing a change in resistance caused by changing of the direction of spin of a ferromagnetic material to parallel or non-parallel, and a method of manufacturing the magnetic storage device.
2. Related Art
As information communication machines and apparatuses, especially personal compact apparatuses, such as portable terminals become increasingly popular, there are demands for devices of higher performance, such as memory elements and logic elements of higher degree of integration, higher speed, and lower power consumption. Particularly, a nonvolatile memory is considered indispensable in the so-called “ubiquitous era”.
For example, even if power supply depletion or failure occurs or disconnection of a server and a network occurs due to unexpected reasons, a nonvolatile memory can protect important personal information, for example. In addition, the increase of density and capacity of the nonvolatile memory is more important as a technology for substituting hard disks or optical/magneto-optical disks which fundamentally cannot be downsized, due to the presence of moving parts, etc.
In addition, recently available portable machines are designed so that a non-operating circuit block is maintained in a standby state to reduce the power consumption to a lowest level as possible, and the waste of power consumption and memory can be avoided if a nonvolatile memory capable of serving as both a high speed network memory and a large storage capacity memory can be realized. Further, if a high-speed large-capacity nonvolatile memory can be realized, a function can be realized such that a machine or apparatus is operable in the instant it is turned on, i.e., a so-called “instant-on” function becomes available.
Examples of nonvolatile memories include a flash memory using a semiconductor and an FRAM (ferroelectric random access memory) using a ferroelectric material. However, flash memories have a disadvantage in that the write speed is as low as the order of microsecond. On the other hand, with respect to the FRAM, problems have been pointed out such that the number of allowable rewritings is 1012 to 1014 which is not sufficient to completely replace the existing memory by an SRAM (static random access memory) or a DRAM (dynamic random access memory), and that micro-fabrication of a ferroelectric capacitor is difficult to realize.
A magnetic memory called MRAM described in Wang et al., IEEE Trans. Magn. 33 (1997), 4,498, for example, has been catching attention as a prospective nonvolatile memory which does not present the above-mentioned problems and which operates at high speed, having a large storage capacity (increased degree of integration) and lower power consumption, and, especially as the properties of TMR (tunnel magneto resistance) materials have improved. The MRAM is a semiconductor magnetic memory utilizing a magneto resistance effect based on the spin-dependent conduction phenomenon specific to nonmagnetic materials, and is a nonvolatile memory which can keep storage without supplying electric power from the outside.
In addition, the MRAM has a simple structure, it is easy to increase its degree of integration and it records data by utilizing rotation of a magnetic moment to therefore have higher endurance. It is expected that the access time of an MRAM is very fast and it has already been reported in R. Scheuerlein et al, ISSCC Digest of Technical Papers, pp. 128-129, February 2000 that the MRAM can be operated at 100 MHz. Recently, as reported in k. Inomata, Abstracts 18aA-1 of The 26th Annual Conference on Magnetics in Japan, and the like, the MRAM has been seen as a prospective main nonvolatile memory of the next generation.
A further description of the MRAM is provided in FIG. 9, in which a TMR element 10 serving as a memory element of a memory cell of MRAM includes a storage layer 2 in which the magnetization turns relatively easily, and magnetized pinned layers 4, 6, which are formed on a supporting substrate 9.
The magnetized pinned layer includes two magnetized pinned layers, i.e., a first magnetized pinned layer 4 and a second magnetized pinned layer 6, and between them is disposed a conductive layer 5 through which these magnetic layers are antiferromagnetically bound. In the storage layer 2 and magnetized pinned layers 4, 6, a ferromagnetic material including nickel, iron, or cobalt, or an alloy thereof is used, and, as a material for the conductive layer 5, ruthenium, copper, chromium, gold, silver, or the like can be used. The second magnetized pinned layer 6 is in contact with an antiferromagnetic material layer 7, and the exchange interaction between these layers causes the second magnetized pinned layer 6 to have strong magnetic anisotropy in one direction. As a material for the antiferromagnetic material layer 7, a manganese alloy with iron, nickel, platinum, iridium, or rhodium, or cobalt or nickel oxide can be used.
A tunnel barrier layer 3 of an insulator including an oxide or nitride of aluminum, magnesium, silicon, or the like is disposed between the storage layer 2 and the first magnetized pinned layer 4 as magnetic layers, and breaks the magnetic binding between the storage layer 2 and the magnetized pinned layer 4 and permits a tunnel current to flow. The magnetic layers and conductive layers are formed mainly by a sputtering method, but the tunnel barrier layer 3 can be obtained by oxidizing or nitriding a metal film formed by sputtering. A topcoat layer 1 has roles in preventing mutual diffusion between the TMR element 10 and the wiring connected to the TMR element, lowering the contact resistance, and preventing oxidation of the storage layer 2, and, in general, a material, such as Cu, Ta, or TiN, can be used. An undercoat electrode layer 8 is used for connecting a switching element connected in series to the TMR element. The undercoat layer 8 may serve as the antiferromagnetic material layer 7.
In the thus constructed memory cell, a change of the tunnel current caused by a magneto resistance effect is detected to read information as described below, and the effect depends on the relative direction of magnetization of the storage layer and the magnetized pinned layer.
FIG. 17 is an enlarged perspective view schematically showing part of a generic MRAM. Here, for simplifying the drawing, a read-out circuit portion is not shown, and, for example, the MRAM includes nine memory cells, and has bit lines 11 and word lines 12 for write, which cross one another. At each crossing point is disposed the TMR element 10, and, in writing on the TMR element 10, a current is applied to the bit line 11 and word line 12 for write, and a composite magnetic field of the magnetic fields generated from the above lines changes the direction of magnetization of the storage layer 2 in the TMR element 10 at the crossing point of the bit line 11 and the word line 12 for write to be parallel or non-parallel to the magnetized pinned layer, thus achieving writing.
FIG. 18 schematically shows the cross-section of a memory cell, and, for example, an n-type field effect transistor 19 for read-out including a gate insulating film 15 formed in the p-type well region formed in a p-type silicon semiconductor substrate 13, a gate electrode 16, a source region 17, and a drain region 18 is disposed, and the word line 12 for write, the TMR element 10, and the bit line 11 are disposed on the transistor. To the source region 17 is connected a sense line 21 through a source electrode 20. The field effect transistor 19 serves as a switching element for read-out, and a wiring 22 for read-out drawn from a portion between the word line 12 and the TMR element 10 is connected to the drain region 18 through a drain electrode 23. The transistor 19 may be an n-type or p-type field effect transistor, but, instead, various switching elements, such as a diode, a bipolar transistor, and a MESFET (metal semiconductor field effect transistor), can be used.
FIG. 19 is an equivalent circuit diagram of an MRAM, and, for example, it includes six memory cells, and has bit lines 11 and word lines 12 for write, which cross one another, and, at the crossing point of these write lines, it has a memory element 10, and a field effect transistor 19 and a sense line 21 which are connected to the memory element 10 to select an element upon reading-out. The sense line 21 is connected to a sense amplifier 23 to detect information stored. In the figure, numeral 24 designates a word line current driving circuit for bidirectional write, and numeral 25 designates a bit line current driving circuit.
FIG. 20 is an asteroid curve showing the write conditions of MRAM, and indicates a threshold for inversion of the direction of magnetization of the storage layer by the applied magnetic field HEA in the direction of easy magnetization axis and magnetic field HHA in the direction of hard magnetization axis. When a composite magnetic field vector corresponding to the outside of the asteroid curve is generated, magnetic field inversion is caused, but a composite magnetic field vector of inside of the asteroid curve cannot cause inversion of the cell in one current stable state. In addition, in the cell not at the crossing point of the word line and the bit line through which current is applied, a magnetic field generated solely by the word line or bit line is applied and, when the magnetic field generated is equal to or higher than the inversion magnetic field HK in one direction, the direction of magnetization of the cell not at the crossing point is inverted, and therefore, the element is set so that selective writing on the selected cell is possible only when the composite magnetic field falls within the gray region in the figure.
As described above, in the MRAM, using two write lines, i.e., a bit line and a word line and utilizing the asteroid magnetization inversion properties, writing is generally conducted only on a selected memory cell by inversion of the magnetic spin. The composite magnetization in a single storage region is determined by synthesizing vectors of the magnetic field HEA in the direction of easy magnetization axis and the magnetic field HHA in the direction of hard magnetization axis applied to the storage region. The write current applied to the bit line applies to the cell the magnetic field HEA in the direction of easy magnetization axis, and the current applied to the word line applies to the cell the magnetic field HHA in the direction of hard magnetization axis.
FIG. 21 illustrates the read-out operation of an MRAM. Here, the layer construction of the TMR element 10 is schematically shown, and the above-mentioned magnetized pinned layer is indicated as a single layer 26, and the layers are not shown, excluding the storage layer 2 and the tunnel barrier layer 3.
Specifically, as mentioned above, in information writing, the magnetic spin of the cell is inverted by the composite magnetic field at the crossing point of the bit line 11 and the word line 12 disposed in a matrix form to record information of “1” or “0” according to the direction of the magnetic spin. On the other hand, read-out is achieved utilizing a TMR effect which is an applied form of the magnetoresistance effect, wherein the TMR effect is a phenomenon in which the resistance changes depending on the direction of the magnetic spin, and information of “1” or “0” is detected according to the state of high resistance in which the magnetic spin is non-parallel or the state of low resistance in which the magnetic spin is parallel. The read-out is conducted by permitting a read-out current (tunnel current) between the word line 12 and the bit line 11 and reading the output according the high or low resistance by the sense line 21 through the field effect transistor 19 for read-out.
As mentioned above, differing from a conventional memory function utilizing electrons (electricity), the MRAM is a device using as a memory medium a change of the magnetoresistance caused by changing of the direction of magnetization, which needs to operate the response of changing of the direction of magnetization at a speed equivalent to the speed of the response of the conduction of electrons. The direction of magnetization of the TMR element in the MRAM changes depending on the current which flows a metal wiring. That is, current is applied a wiring to generate a magnetic field around the wiring as a center. The TMR element (hereinafter, frequently referred to as “MRAM element”, and also as “MTJ”) detects the magnetic field generated, so that the magnetic material in the TMR element is magnetized in the direction linked to the direction of the magnetic field generated from the wiring. The magnetic material magnetized causes a magnetoresistance, and the magnetoresistance is read as a change of voltage or current. It is important that the magnetic field generated is efficiently introduced to the TMR element, and this efficiency is considered to determine the operation speed and sensitivity of the TMR element. Factors for efficiently introducing the magnetic field to the TMR element include: (I) generation of an intense magnetic field; (II) suppression of leakage of the magnetic field; (III) arrangement of the MRAM element in the intense magnetic field portion; (IV) high sensitivity of the MRAM (TMR) element, and the like.
With respect to the factor (I), the intensity of a magnetic field depends on the current density, and, as the current density of a wiring increases, the intensity of the magnetic field increases. The increase of the current density promotes electromigration of the wiring, and hence the use of not an aluminum wiring but a copper wiring prevents the problem. With respect to the factor (III), the problem is solved by arranging a wiring and the MRAM element so that they are close to each other. With respect to the factor (IV), the problem is solved by improving the material and method for forming the MRAM element.
With respect to the factor (II), a detailed explanation is made. Storage in the MRAM is made by rotating the magnetization of the storage layer utilizing an induced magnetic field generated by allowing a current to flow a wiring. However, as the wiring becomes thinner due to the increase of the degree of integration, the critical value of a current which can flow the write line is lowered, so that only a weak magnetic field can be obtained, thus inevitably reducing the coercive force of the storage region. This means that the reliability of the information storage device is lowered. In addition, unlike a light or an electron beam, a magnetic field cannot be focused and this is considered to be the biggest cause of cross talk when the degree of integration is increased. For preventing this, a keeper structure and the like have been proposed (see, for example, U.S. Pat. No. 6,413,788), but they inevitably cause the structure to be complicated. As described above, writing using a current magnetic field has a number of fundamental problems to be solved, and the writing using an induced magnetic field may be a great defect of the future MRAM.
With respect to the factor (II), an attempt is made to solve the problem by a method using a cladding structure in which a wiring portion is covered with a soft magnetic material (see, for example, Japanese Patent Application Laid-Open No. 2002-246566). A general cladding structure formed from a buried wiring and its effects are described with reference to FIG. 22.
FIG. 22A schematically shows a word line 12 and a bit line 11 including a cladding structure and a TMR element 10 between the wirings, and the write lines 12, 11 having the element 10 disposed therebetween are individually formed by composite structures (cladding structures) including, respectively, nonmagnetic conductors 30, 31 including a conductive material, such as Cu, Al, or an alloy thereof, and soft magnetic materials 32, 33 having high magnetic permeability and covering the nonmagnetic conductors. As a constituent material for the soft magnetic conductors 32, 33, for example, Ni, Fe, Co, or an alloy included mainly of these may be used. Specifically, a Ni—Fe alloy (iron-nickel alloy) called Permalloy is used.
The write lines 11, 12 individually have a cross-section in a substantially rectangular form, and three planes of each write line, excluding the plane on the side of the memory element 10, are covered with the substantially U-shaped soft magnetic conductors 32, 33 and the nonmagnetic conductors 30, 31 are exposed only through the respective surfaces on the side of the memory element 10. Therefore, the exposed surfaces of the nonmagnetic conductors 31, 32 of the write lines 11, 12 face to each other, and the soft magnetic conductors 32, 33 are arranged symmetrically. Further, the write lines 11, 12 are individually formed so that the cross-section width (indicated by A or B in the figure) of the exposed portions of the nonmagnetic conductors 30, 31 on the side of the memory element 10 is equal to or larger than the element width (indicated by a or b in the figure) of the memory element 10.
In the MRAM using the write lines 11, 12 having the above construction, portions of the soft magnetic conductors 32, 33 in the cladding structure transmit a magnetic flux, and therefore magnetic lines of force, which are generally distributed around the write line, converge due to the soft magnetic conductor 32, 33 having high magnetic permeability, so that the magnetic lines of force generated converge on the exposed portions of the nonmagnetic conductors 30, 31, i.e., portion of the memory element 10.
FIG. 22B is an explanatory view illustrating a specific example of the simulation of magnetic lines of force generated around one write line. It is found that, when a write current is applied to the write line in a substantially rectangular form having its three planes covered with the soft magnetic conductors 32, 33 as shown in FIG. 22A, magnetic lines of force generated are not uniformly distributed around the write line but converge on portions of the nonmagnetic conductors 30, 31 due to the magnetic flux transmission of the soft magnetic conductors 32, 33. Specifically, the mathematical simulation indicates that, when the width and thickness of the write lines 11, 12 are individually 0.25 μm and a current of 1 mA is applied to the write lines, a magnetic field of about 85 Oe is generated in the center portion of the memory element 10 facing the nonmagnetic conductors 30, 31.
By contrast, when the write line is constituted only by a nonmagnetic conductor, magnetic lines of force generated are uniformly distributed around the write line, and therefore, when a current of 1 mA is applied to the write line having a width and a thickness of 0.25 μm, only a magnetic field as small as about 23 Oe is obtained in the center portion of the memory element 10.
Therefore, by using the write lines 11, 12 having the above cladding structure, a magnetic field for write can be generated more efficiently than the conventional magnetic lines of force uniformly distributed, so that inversion of the direction of magnetization of the memory element 10 can be achieved by a smaller current.
For efficiently obtaining the above effect, it is desired that the magnetic permeability of the soft magnetic conductors 32, 33 covering the magnetic conductors 30, 31 of the write lines 11, 12 is generally 10 or more. It has been confirmed that, when the thickness of the soft magnetic conductors covering the magnetic conductors is 0.01 μm or more, an effect to increase the magnetic field generated can be obtained.
If the three planes of the substantially rectangular form are covered with the soft magnetic conductors 32, 33, a larger number of magnetic lines of force converge on the inside portions (portions of the nonmagnetic conductors 30, 31) of the both edge portions of the substantially U-shaped soft magnetic conductors 32, 33. For this reason, when the cross-section width A, B of the nonmagnetic conductors 30, 31 is equal to or larger than the element width a, b of the memory element 10, the width of the information storage layer 2 of the memory element 10 is smaller than the distance between the both edge portions of the soft magnetic conductors 32, 33, so that the information storage layer 2 is disposed between the edge portions, thus making it possible to efficiently focus the generated magnetic lines of force on the information storage layer 2.
As mentioned above, in the MRAM shown in FIG. 22, the write lines 11, 12 individually have a composite structure including the nonmagnetic conductors 30, 31 and the soft magnetic conductors 32, 33, and hence, if current is applied to the write lines, lines of magnetic force are generated and converge on portions of the nonmagnetic conductors, so that information writing on the memory element 10 can be achieved by a write current smaller than the write current conventionally required. Therefore, the write current can be reduced without lowering the coercive force of the memory element, making it easy to realize shrinking of the MRAM (increase of the density) by scaling-down the write line driving circuit or the like, reduction of power consumption, improvement of reliability by suppressing wiring breakage due to electromigration in the write line, and the like.
Next, a method (damascene method) for forming the above-mentioned cladding structure from a buried wiring is described below. Examples of wirings using the cladding structure include a word line (wiring on the lower side of the TMR element) and a bit line (wiring on the upper side of the TMR element), and a word line having a simple structure is mainly described here. (A bit line can be formed in a similar way.)
FIGS. 23A to 27B show a method for forming a cladding structure of a word line (or a bit line) from a trench wiring. In these figures, only wiring portions are shown, and a substrate, a transistor, and the like under the word line are not shown. (An undercoat wiring connected to the drain region of a transistor is actually present under the drain electrode wiring for read-out formed simultaneously with the word line, but this is not shown in the figures).
First, as shown in FIG. 23A, a trench 40 to be plugged with a wiring is formed in an insulating layer 41, and then, as shown in FIG. 23B, a first diffusion barrier layer 42 for word line and read-out line is formed on the entire surface including the wiring trench 40. The first diffusion barrier layer 42 is deposited over a bottom surface 43 and a sidewall 44 of the wiring trench 40, and a field portion 45, excluding the wiring portion (namely, the entire surface).
As a constituent material for the first diffusion barrier layer 42, tantalum (Ta), tantalum nitride (TaN), titanium (Ti), titanium nitride (TiN), tungsten nitride (WN), zirconium nitride (ZrN) and the like, is used. In deposition of this layer, a sputtering method is widely used, but other examples include a chemical vapor deposition (hereinafter, referred to as “CVD”) method and an ALD (atomic layer deposition) method, and the method for deposition is selected depending on the form and size of the wiring trench in which the barrier metal layer is formed.
Next, as shown in FIG. 23C, a soft magnetic material layer 33 is deposited on the first diffusion barrier layer 42. As a constituent material for the soft magnetic material layer 33, nickel-iron Permalloy, cobalt-iron, or the like is used, and, in deposition for the layer, a sputtering method is generally used.
Then, as shown in FIG. 23D, a second diffusion barrier layer 4 and 6 is formed on the soft magnetic material layer 33. In this case, the first diffusion barrier layer 4 and 6 is formed for preventing the constituent ingredient of the soft magnetic material layer 33 from diffusing into the adjacent insulating film, e.g., insulating layer 41, and the second diffusion barrier layer 4 and 6 is formed for preventing mutual diffusion between the soft magnetic material layer 33 and the below-described buried copper (Cu) wiring. The constituent material and deposition method for the second diffusion barrier layer 4 and 6 are the same as those for the first diffusion barrier layer 42.
Then, as shown in FIG. 23E, a seed layer 47 for the below-described plugging the wiring trench 40 with copper is deposited. As described below, electro-plating of copper (Cu) is widely used in plugging the wiring trench 40, and the seed layer 47 serves as a growth nucleus for the initial deposition in the electro-plating and an electrode for electrical conduction. Therefore, a material similar to the material deposited by electro-plating is generally used. In deposition for the seed layer 47, a sputtering method or a CVD method is used.
Then, as shown in FIG. 24A, using the seed layer 47 as a growth nucleus and an electrode, a copper (Cu) layer 31A constituting wiring is deposited by electro-plating on the entire surface including the wiring trench 40. In this case, as mentioned above, electro-plating is generally used, but electroless plating or CVD method may be used.
Then, as shown in FIG. 24B, the copper (Cu) layer 31A (including the seed layer 47), second diffusion barrier layer 4 and 6, soft magnetic material layer 33, and first diffusion barrier layer 42 deposited on the portion excluding the wiring trench 40 are removed so that copper constituting the wiring remains only in the wiring trench 40 as a nonmagnetic conductor 31 for the word line 12 and a nonmagnetic conductor 51 for the read-out line 23 and the second diffusion barrier layer 4 and 6, soft magnetic material layer 33, and first diffusion barrier layer 42 remain around the above conductors. In this step, generally, a chemical mechanical polishing method (CMP; hereinafter, referred to as “CMP”) is used.
Here, as shown in FIG. 22A, the soft magnetic material layer 33 is present in the wiring trench 40 so as to cover the copper layers 31, 51 as wiring, and this structure is generally called a cladding structure or yoke structure. The word line (wiring on the lower side of the TMR or MRAM element) is described here, and on the word line is disposed the MRAM element through the insulating layer 48. The purpose of the cladding structure is to effectively supply the magnetic field induced by a current fed to the wiring (wiring in the cladding structure; hereinafter, frequently referred to as “cladding wiring”) to the TMR element, and therefore no soft magnetic material layer is formed on the surface of the cladding wiring. (here, the upper surface of the wiring) which faces the TMR element.
Next, as shown in FIG. 24C, for preventing the wiring copper 31, 51 from diffusing, an insulating film 48 including silicon nitride (SiN), silicon carbide (SiC) or the like for preventing copper diffusion is deposited. On the insulating film, a silicon oxide film (SiO2) (not shown) may be deposited to constitute an interlayer dielectric film together with the insulating film 48, but deposition of the silicon oxide film is not always needed, and the interlayer dielectric film may be formed only from the insulating film 48 for preventing diffusion.
Then, as shown in FIG. 24D, a contact hole 49 for connecting a TMR element and a read-out line 23 is formed in the insulating film 48 by lithography and dry etching, and then, on the entire surface including the contact hole 49, layers of constituent materials for the TMR element are successively deposited by a sputtering method or the like. For example, Ta (undercoat layer) 8, a stacked film 26 including PtMn (antiferromagnetic material layer), CoFe (second magnetized pinned layer), Ru (antiferromagnetic binding layer), and CoFe (first magnetized pinned layer), a tunnel barrier layer 3 including Al2O3, CoFe-30B (storage layer) 2, and Ta (topcoat layer) 1 are successively deposited.
Then, as shown in FIG. 25A, a portion constituting the TMR element 10 is formed by lithography and dry etching, and then a wiring 60 for connecting the TMR element 10 and the read-out line 23 is formed by lithography and dry etching. The wiring 60 may be including the stacked film 26 and the undercoat layer 8, but the material for the film on the undercoat layer 8 may be arbitrarily changed.
Then, as shown in FIG. 25B, an insulating layer 50 is formed on the entire surface, and then a contact hole 52 is formed in the insulating layer 50 by lithography and dry etching.
Then, as shown in FIG. 25C, a first diffusion barrier layer 53 for bit line is formed on the entire surface including the contact hole 52 and a wiring trench (not shown). As a constituent material for the first diffusion barrier layer 53, tantalum (Ta), tantalum nitride (TaN), titanium (Ti), titanium nitride (TiN), tungsten nitride (WN), zirconium nitride (ZrN), or the like is used. In deposition of this layer, a sputtering method is widely used, and other examples include a CVD method and an ALD method, and the method for deposition is selected depending on the form and size of the contact hole in which the barrier metal layer is formed.
Then, as shown in FIG. 26A, a soft magnetic material layer 54 is deposited on the first diffusion barrier layer 53. As a constituent material for the soft magnetic material layer 54, nickel-iron Permalloy, cobalt-iron, or the like is used, and, in deposition of the layer, a sputtering method is generally used.
Then, as shown in FIG. 26B, only the soft magnetic material layer 54 on the bottom of the contact hole 52 and the bottom of a wiring trench 61 indicated by a virtual line is removed by a method of dry etching, ion milling, or etch back.
Then, as shown in FIG. 26C, a second diffusion barrier layer 55 is formed on the soft magnetic material layer 54. In this case, the first diffusion barrier layer 53 is formed for preventing the constituent ingredient of the soft magnetic material layer 54 from diffusing into the adjacent insulating film, e.g., insulating layer 50, and the second diffusion barrier layer 55 is formed for preventing mutual diffusion between the soft magnetic material layer 54 and the below-described buried copper (Cu) wiring. The constituent material and deposition method for the second diffusion barrier layer 55 are the same as those for the first diffusion barrier layer 53.
Then, a seed layer (not shown) for plugging the wiring trench 61 including the contact hole 52 with copper is deposited in the same manner as shown in FIG. 23E. Electro-plating of copper (Cu) is widely used in plugging, and the seed layer serves as a growth nucleus for the initial deposition in the electro-plating and an electrode for electrical conduction. Therefore, a material similar to the material deposited by electro-plating is generally used. In deposition of the seed layer, a sputtering method or a CVD method is used.
Then, as shown in FIG. 27A, using the seed layer as a growth nucleus and an electrode, a copper (Cu) layer 30A constituting wiring is deposited by electro-plating on the entire surface including the contact hole 52 and wiring trench 61. In this case, as mentioned above, electro-plating is generally used, but electroless plating or CVD method may be used.
Then, as shown in FIG. 27B, the copper (Cu) layer 30A (including the seed layer), second diffusion barrier layer 55, soft magnetic material layer 54, and first diffusion barrier layer 53 deposited on the portion excluding the contact hole 52 and wiring trench 61 are removed so that the copper constituting wiring remains as the nonmagnetic conductor 30 for the bit line 11 only in the contact hole 52 and wiring trench 61 and the second diffusion barrier layer 55, soft magnetic material layer 54, and first diffusion barrier layer 53 remain around the conductor. In this step, CMP is generally used. Then, a diffusion barrier layer 57 similar to the above one is formed on the copper layer 30A by a sputtering method, and then a soft magnetic material layer 56 including the same material as that for the soft magnetic material layer 54 is deposited by a sputtering method so that it is connected to the soft magnetic material layer 54 on the sidewall of the wiring trench, and patterned into a predetermined form, thus forming a soft magnetic material layer 32 covering the copper layer 30 shown in FIG. 22A.
Here, the soft magnetic material layer 32 is present in the contact hole 52 and wiring trench 61 so as to cover the copper layer 30 as wiring, and this structure is generally called a cladding structure or yoke structure. The bit line (wiring on the upper side of the TMR or MRAM element) is described here, and under the bit line is disposed the MRAM element through the insulating layer 50. The purpose of the cladding structure is to effectively supply the magnetic field induced by a current fed to the cladding wiring to the TMR element, and therefore no soft magnetic material layer is formed on the surface of the cladding wiring (here, the lower surface of the wiring) which faces the TMR element.
Thus, an MRAM (TMR) element having the word line 12, read-out line 23, and bit line 11, in which a copper layer, a soft magnetic material layer, and diffusion preventing layers are buried, can be prepared by a damascene method.
In the above-described method, in the steps of FIGS. 23A to 23E and FIGS. 25B to 26C, as mentioned above, sputtering is generally used as a deposition method, and hence the use of a multi-chamber sputtering machine enables successive deposition.